
W90P710CD/W90P710CDG
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HSUART Transmit Holding Register (HSUART_THR)
REGISTER OFFSET R/W DESCRIPTION RESET VALUE
HSUART_THR
0x00 W Transmit Holding Register (DLAB = 0) Undefined
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
8-bit Transmitted Data
BITS DESCRIPTIONS
[7:0]
8-bit Transmitted Data
By writing to this register, the UART will send out an
8-bit data through the SOUT pin (LSB first).
HSUART Interrupt Enable Register (HSUART_IER)
REGISTER OFFSET R/W DESCRIPTION RESET VALUE
HSUART_IER
0x04 R/W Interrupt Enable Register (DLAB = 0) 0x0000_0000
31 30 29 28 27 26 25 24
Reserved
23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8
Reserved
7 6 5 4 3 2 1 0
RESERVED
nDBGACK_EN MSIE RLSIE THREIE RDAIE
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