Rainbow-electronics ATtiny861_V Bedienungsanleitung Seite 39

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39
2588B–AVR–11/06
ATtiny261/461/861
9. System Control and Reset
9.0.1 Resetting the AVR
During reset, all I/O Registers are set to their initial values, and the program starts execution
from the Reset Vector. The instruction placed at the Reset Vector must be a RJMP – Relative
Jump – instruction to the reset handling routine. If the program never enables an interrupt
source, the Interrupt Vectors are not used, and regular program code can be placed at these
locations. The circuit diagram in Figure 9-1 shows the reset logic. ”System and Reset Character-
istics” on page 189 defines the electrical parameters of the reset circuitry.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes
active. This does not require any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal
reset. This allows the power to reach a stable level before normal operation starts. The time-out
period of the delay counter is defined by the user through the SUT and CKSEL Fuses. The dif-
ferent selections for the delay period are presented in ”Clock Sources” on page 26.
9.0.2 Reset Sources
The ATtiny261/461/861 has four sources of reset:
Power-on Reset. The MCU is reset when the supply voltage is below the Power-on Reset
threshold (V
POT
).
External Reset. The MCU is reset when a low level is present on the RESET
pin for longer than
the minimum pulse length.
Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and the
Watchdog is enabled.
Brown-out Reset. The MCU is reset when the supply voltage V
CC
is below the Brown-out Reset
threshold (V
BOT
) and the Brown-out Detector is enabled.
Figure 9-1. Reset Logic
MCU Status
Register (MCUSR)
Brown-out
Reset Circuit
BODLEVEL [1..0]
Delay Counters
CKSEL[1:0]
CK
TIMEOUT
WDRF
BORF
EXTRF
PORF
DATA BU S
Clock
Generator
SPIKE
FILTER
Pull-up Resistor
Watchdog
Oscillator
SUT
[
1:0
]
Power-on Reset
Circuit
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