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499
8266A-MCU Wireless-12/09
ATmega128RFA1
Address
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
(0x92) TCCR3C FOC3A FOC3B FOC3C Res4 Res3 Res2 Res1 Res0 279
(0x91) TCCR3B ICNC3 ICES3 Res WGM33 WGM32 CS32 CS31 CS30 278
(0x90) TCCR3A COM3A1 COM3A0 COM3B1 COM3B0 COM3C1 COM3C0 WGM31 WGM30 276
... Reserved
(0x8D) OCR1CH OCR1CH7 OCR1CH6 OCR1CH5 OCR1CH4 OCR1CH3 OCR1CH2 OCR1CH1 OCR1CH0 273
(0x8C) OCR1CL OCR1CL7 OCR1CL6 OCR1CL5 OCR1CL4 OCR1CL3 OCR1CL2 OCR1CL1 OCR1CL0 273
(0x8B) OCR1BH OCR1BH7 OCR1BH6 OCR1BH5 OCR1BH4 OCR1BH3 OCR1BH2 OCR1BH1 OCR1BH0 272
(0x8A) OCR1BL OCR1BL7 OCR1BL6 OCR1BL5 OCR1BL4 OCR1BL3 OCR1BL2 OCR1BL1 OCR1BL0 272
(0x89) OCR1AH OCR1AH7 OCR1AH6 OCR1AH5 OCR1AH4 OCR1AH3 OCR1AH2 OCR1AH1 OCR1AH0 271
(0x88) OCR1AL OCR1AL7 OCR1AL6 OCR1AL5 OCR1AL4 OCR1AL3 OCR1AL2 OCR1AL1 OCR1AL0 271
(0x87) ICR1H ICR1H7 ICR1H6 ICR1H5 ICR1H4 ICR1H3 ICR1H2 ICR1H1 ICR1H0 273
(0x86) ICR1L ICR1L7 ICR1L6 ICR1L5 ICR1L4 ICR1L3 ICR1L2 ICR1L1 ICR1L0 274
(0x85) TCNT1H TCNT1H7 TCNT1H6 TCNT1H5 TCNT1H4 TCNT1H3 TCNT1H2 TCNT1H1 TCNT1H0 270
(0x84) TCNT1L TCNT1L7 TCNT1L6 TCNT1L5 TCNT1L4 TCNT1L3 TCNT1L2 TCNT1L1 TCNT1L0 271
... Reserved
(0x82) TCCR1C FOC1A FOC1B FOC1C Res4 Res3 Res2 Res1 Res0 270
(0x81) TCCR1B ICNC1 ICES1 Res WGM13 WGM12 CS12 CS11 CS10 268
(0x80) TCCR1A COM1A1 COM1A0 COM1B1 COM1B0 COM1C1 COM1C0 WGM11 WGM10 266
(0x7F) DIDR1 AIN1D AIN0D 409
(0x7E) DIDR0 ADC7D ADC6D ADC5D ADC4D ADC3D ADC2D ADC1D ADC0D 433
(0x7D) DIDR2 ADC15D ADC14D ADC13D ADC12D ADC11D ADC10D ADC9D ADC8D 433
(0x7C) ADMUX REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0 427
(0x7B) ADCSRB AVDDOK ACME REFOK ACCH MUX5 ADTS2 ADTS1 ADTS0 428
(0x7A) ADCSRA ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0 430
(0x79) ADCH ADCH7 ADCH6 ADCH5 ADCH4 ADCH3 ADCH2 ADCH1 ADCH0 432
(0x78) ADCL ADCL7 ADCL6 ADCL5 ADCL4 ADCL3 ADCL2 ADCL1 ADCL0 432
(0x77) ADCSRC ADTHT1 ADTHT0 Res0 ADSUT4 ADSUT3 ADSUT2 ADSUT1 ADSUT0 431
... Reserved
(0x75) NEMCR Res7 ENEAM AEAM1 AEAM0 Res3 Res2 Res1 Res0 463
(0x74) Reserved Res7 Res6 Res5 Res4 Res3 Res2 Res1 Res0
(0x73) TIMSK5 Res1 Res0 ICIE5 Res OCIE5C OCIE5B OCIE5A TOIE5 302
(0x72) TIMSK4 Res1 Res0 ICIE4 Res OCIE4C OCIE4B OCIE4A TOIE4 293
(0x71) TIMSK3 Res1 Res0 ICIE3 Res OCIE3C OCIE3B OCIE3A TOIE3 284
(0x70) TIMSK2 Res4 Res3 Res2 Res1 Res0 OCIE2B OCIE2A TOIE2 323
(0x6F) TIMSK1 Res1 Res0 ICIE1 Res OCIE1C OCIE1B OCIE1A TOIE1 274
(0x6E) TIMSK0 Res4 Res3 Res2 Res1 Res0 OCIE0B OCIE0A TOIE0 242
(0x6D) PCMSK2 PCINT23 PCINT22 PCINT21 PCINT20 PCINT19 PCINT18 PCINT17 PCINT16 224
(0x6C) PCMSK1 PCINT15 PCINT14 PCINT13 PCINT12 PCINT11 PCINT10 PCINT9 PCINT8 224
(0x6B) PCMSK0 PCINT7 PCINT6 PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 225
(0x6A) EICRB ISC71 ISC70 ISC61 ISC60 ISC51 ISC50 ISC41 ISC40 220
(0x69) EICRA ISC31 ISC30 ISC21 ISC20 ISC11 ISC10 ISC01 ISC00 219
(0x68) PCICR Res4 Res3 Res2 Res1 Res0 PCIE2 PCIE1 PCIE0 223
(0x67) BGCR Res BGCAL_FINE3 BGCAL_FINE2 BGCAL_FINE1 BGCAL_FINE0 BGCAL2 BGCAL1 BGCAL0 433
(0x66) OSCCAL CAL7 CAL6 CAL5 CAL4 CAL3 CAL2 CAL1 CAL0 153
(0x65) PRR1 Res PRTRX24 PRTIM5 PRTIM4 PRTIM3 PRUSART1 168
(0x64) PRR0 PRTWI PRTIM2 PRTIM0 PRPGA PRTIM1 PRSPI PRUSART0 PRADC 167
(0x63) PRR2 Res3 Res2 Res1 Res0 PRRAM3 PRRAM2 PRRAM1 PRRAM0 168
... Reserved
(0x61) CLKPR CLKPCE Res2 Res1 Res0 CLKPS3 CLKPS2 CLKPS1 CLKPS0 154
(0x60) WDTCSR WDIF WDIE WDP3 WDCE WDE WDP2 WDP1 WDP0 183
0x3F (0x5F)
SREG I T H S V N Z C 11
0x3E (0x5E)
SPH SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 13
0x3D (0x5D)
SPL SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0 14
... Reserved
0x3B (0x5B)
RAMPZ Res5 Res4 Res3 Res2 Res1 Res0 RAMPZ1 RAMPZ0 14
... Reserved
0x37 (0x57)
SPMCSR SPMIE RWWSB SIGRD RWWSRE BLBSET PGWRT PGERS SPMEN 462
... Reserved
0x35 (0x55)
MCUCR JTD Res1 Res0 PUD Res1 Res0 IVSEL IVCE 204
0x34 (0x54)
MCUSR Res2 Res1 Res0 JTRF WDRF BORF EXTRF PORF 183
0x33 (0x53)
SMCR Res3 Res2 Res1 Res0 SM2 SM1 SM0 SE 166
... Reserved
0x31 (0x51)
OCDR OCDR7 OCDR6 OCDR5 OCDR4 OCDR3 OCDR2 OCDR1 OCDR0 440
0x30 (0x50)
ACSR ACD ACBG ACO ACI ACIE ACIC ACIS1 ACIS0 408
- Features 1
- Applications 1
- 1 Pin Configurations 2
- 2 Disclaimer 2
- • over 10 years at 85°C 8
- • TBD years at 25°C 8
- ATmega128RFA1 11
- 8 AVR Memories 18
- 8.3 EEPROM Data Memory 20
- 8.7 Other Port Registers 26
- Section 34
- 9.4 Operating Modes 35
- is reduced 40
- E v e n t 41
- B lo c k 41
- T R X R S T 41
- XO S C = O N 44
- X O S C =O FF 44
- 51 20 704 56
- 9.5 Functional Description 61
- Frame Length Value Payload 62
- 0 - 4 Reserved 62
- 5 MPDU (Acknowledgement) 62
- 6 – 8 Reserved 62
- 9 - aMaxPHYPacketSize MPDU 62
- )()( xxMxN ⋅= 66
- PHY_ED_LEVEL Description 69
- 0xFF Reset value 69
- Extended Operating Mode 69
- 9.6 Module Description 74
- The receiver is designed to 75
- IC internal 82
- 9.7 Radio Transceiver Usage 83
- ATm ega128R FA 1 89
- 9.10 Abbreviations 98
- 9.11 Reference Documents 100
- 9.12 Register Description 100
- NA ($13D) AES_ER 101
- AES_STATE7:0 AES_STATE 102
- AES_KEY7:0 AES_KEY 102
- 8266A-MCU Wireless-12/09 103
- SFD_VALUE7:0 SFD_VALUE 111
- 2 Antenna 0: DIG1=L, DIG2=H 114
- Antenna Diversity 114
- Bit 7 6 5 4 117
- Read/Write RW RW RW RW 117
- Initial Value 1 1 1 1 117
- RX_PDT_DIS Res2 RX_SYN 118
- Res1 Res0 RX_SYN 118
- Initial Value 0 1 0 1 120
- PART_NUM7:0 PART_NUM 122
- VERSION_NUM7:0 VERSION_NUM 122
- MAN_ID_07:00 MAN_ID_0 123
- MAN_ID_17:10 MAN_ID_1 123
- PAN_ID_07:00 PAN_ID_0 124
- PAN_ID_17:10 PAN_ID_1 124
- IEEE_ADDR_07:00 IEEE_ADDR_0 124
- IEEE_ADDR_17:10 IEEE_ADDR_1 125
- IEEE_ADDR_27:20 IEEE_ADDR_2 125
- IEEE_ADDR_37:30 IEEE_ADDR_3 125
- IEEE_ADDR_47:40 IEEE_ADDR_4 126
- IEEE_ADDR_57:50 IEEE_ADDR_5 126
- IEEE_ADDR_67:60 IEEE_ADDR_6 126
- IEEE_ADDR_77:70 IEEE_ADDR_7 126
- CSMA_SEED_07:00 CSMA_SEED_0 128
- Resx7 Resx6 TST_CTRL_DIGI 131
- Resx5 Resx4 TST_CTRL_DIGI 131
- TRXFBST7:0 TRXFBST 132
- TRXFBEND7:0 TRXFBEND 132
- 10 MAC Symbol Counter 133
- 10.9 Backoff Slot Counter 135
- 10.10 Symbol Counter Usage 135
- 10.11 Register Description 137
- SCCNTHL7:0 SCCNTHL 138
- SCCNTLH7:0 SCCNTLH 138
- SCCNTLL7:0 SCCNTLL 138
- SCTSRHH7:0 SCTSRHH 138
- SCTSRHL7:0 SCTSRHL 139
- SCTSRLH7:0 SCTSRLH 139
- SCTSRLL7:0 SCTSRLL 139
- SCBTSRHH7:0 SCBTSRHH 139
- SCBTSRHL7:0 SCBTSRHL 140
- SCBTSRLH7:0 SCBTSRLH 140
- SCBTSRLL7:0 SCBTSRLL 140
- SCOCR1HH7:0 SCOCR1HH 140
- SCOCR1HL7:0 SCOCR1HL 141
- SCOCR1LH7:0 SCOCR1LH 141
- SCOCR1LL7:0 SCOCR1LL 141
- SCOCR2HH7:0 SCOCR2HH 141
- SCOCR2HL7:0 SCOCR2HL 142
- SCOCR2LH7:0 SCOCR2LH 142
- SCOCR2LL7:0 SCOCR2LL 142
- SCOCR3HH7:0 SCOCR3HH 142
- 11.1 Overview 147
- 11.3 Clock Sources 148
- 11.6 External Clock 150
- 11.8 Clock Output Buffer 152
- 11.10 System Clock Prescaler 152
- 11.11 Register Description 153
- NA ($61) CLKPCE 154
- 12.1 Deep-Sleep Mode 156
- 12.6 Register Description 166
- NA ($12F) Res1 Res0 LLDONE 172
- NA ($136) PFDRV1 174
- 13 System Control and Reset 176
- 13.4 Watchdog Timer 180
- 13.5 Register Description 183
- 14 I/O-Ports 186
- DPDS0/DPDS1 187
- PUOE 0 0 0 0 194
- Alternate Function 198
- 14.4 Register Description 204
- PINB7:0 PINB 206
- PORTD7:0 PORTD 206
- PIND7:0 PIND 207
- PORTE7:0 PORTE 207
- PINE7:0 PINE 208
- PORTF7:0 PORTF 208
- 15 Interrupts 211
- 15.4 Register Description 216
- 16 External Interrupts 218
- 16.2 Register Description 219
- DATA BUS 226
- 17.4 Counter Unit 227
- = (8-bit Comparator ) 229
- 17.7 Modes of Operation 232
- (Toggle) 233
- OC0xPCPWM 236
- 17.9 Register Description 238
- 18.1 Features 244
- 18.2 Overview 244
- 18.5 Counter Unit 249
- 18.6 Input Capture Unit 250
- DATA BUS (8-bit) 251
- 18.7 Output Compare Units 252
- = (16-bit Comparator ) 253
- DATA BUS (8-bit) 253
- 18.9 Modes of Operation 256
- OCnxPCPWM 262
- OCnxPFCPWM 264
- 18.11 Register Description 266
- TCNT1H7:0 TCNT1H 270
- TCNT1L7:0 TCNT1L 271
- OCR1AH7:0 OCR1AH 271
- OCR1AL7:0 OCR1AL 271
- OCR1BH7:0 OCR1BH 272
- OCR1BL7:0 OCR1BL 272
- OCR1CH7:0 OCR1CH 273
- OCR1CL7:0 OCR1CL 273
- ICR1H7:0 ICR1H 273
- ICR1L7:0 ICR1L 274
- NA ($90) COM3A1 276
- TCNT3H7:0 TCNT3H 280
- TCNT3L7:0 TCNT3L 280
- OCR3AH7:0 OCR3AH 281
- OCR3AL7:0 OCR3AL 281
- OCR3BH7:0 OCR3BH 282
- OCR3BL7:0 OCR3BL 282
- OCR3CH7:0 OCR3CH 282
- OCR3CL7:0 OCR3CL 283
- ICR3H7:0 ICR3H 283
- ICR3L7:0 ICR3L 283
- NA ($A0) COM4A1 285
- TCNT4H7:0 TCNT4H 289
- TCNT4L7:0 TCNT4L 289
- OCR4AH7:0 OCR4AH 290
- OCR4AL7:0 OCR4AL 290
- OCR4BH7:0 OCR4BH 291
- OCR4BL7:0 OCR4BL 291
- OCR4CH7:0 OCR4CH 291
- OCR4CL7:0 OCR4CL 292
- ICR4H7:0 ICR4H 292
- ICR4L7:0 ICR4L 292
- NA ($120) COM5A1 294
- TCNT5H7:0 TCNT5H 298
- TCNT5L7:0 TCNT5L 298
- OCR5AH7:0 OCR5AH 299
- OCR5AL7:0 OCR5AL 299
- OCR5BH7:0 OCR5BH 299
- OCR5BL7:0 OCR5BL 300
- OCR5CH7:0 OCR5CH 300
- OCR5CL7:0 OCR5CL 301
- ICR5H7:0 ICR5H 301
- ICR5L7:0 ICR5L 301
- 19.1 Internal Clock Source 304
- 19.2 Prescaler Reset 304
- 19.3 External Clock Source 304
- 19.4 Register Description 305
- 20.1 Overview 307
- 20.2 Description 307
- 20.3 Timing Example 308
- 21.1 Features 309
- 21.2 Overview 309
- 21.4 Counter Unit 311
- 21.5 Modes of Operation 311
- 21.6 Output Compare Unit 316
- 22.1 Features 330
- Functional Description 330
- Pin Functionality 334
- 22.4 Register Description 336
- SPDR7:0 SPDR 338
- 23.3 Clock Generation 340
- 23.5 USART Initialization 344
- 23.10 Register Description 356
- NA ($C2) UMSEL01 358
- UBRR9 UBRR8 UBRR1H 364
- 24 USART in SPI Mode 368
- 24.4 Frame Formats 370
- NA ($CA) UDORD1 376
- Data Stable Data Stable 378
- Data Change 378
- TWI Unit 382
- 25.6 Using the TWI 384
- 1 X 0 0 X 1 0 X 388
- 400
- 26.2 Register Description 408
- 27.1 Features 410
- 27.3 ADC Start-Up 412
- Tracking Phase Duration t 416
- Settling Time t 418
- 097.0)2000/( ⋅+Ω= 420
- Output Code 422
- NA ($7B) AVDDOK 428
- 28.3 TAP - Test Access Port 436
- 28.9 Bibliography 440
- MSB LSB 442
- 29.5 Boundary-scan Chain 444
- See Boundary-scan 446
- Description for Details! 446
- 30.1 Features 450
- 30.7 Register Description 462
- 31 Memory Programming 464
- 31.3 Signature Bytes 466
- LOAD ADDRESS 476
- (LOW BYTE) 476
- Bit 15 B 0 480
- Program Memory/ 480
- EEPROM Memory 480
- Programming Enable 484
- 33 Register Summary 496
- 34.2 Clock Characteristics 502
- Figure 34-2 504
- Single Ended Conversion 506
- Single Ended Conversion 506
- Gain = 200x 506
- 35 Typical Characteristics 510
- 37 Packaging Information 512
- 39 Revision history 516
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