Rainbow-electronics ATmega8515L Bedienungsanleitung PDF herunterladen (Seite 27)

ATmega8515(L)

2512A–AVR–04/02

Figure 16. ExternalData Memory CycleswithSRWn1 = 1andSRWn0 = 1

(1)

Note: 1. SRWn1 =SRW11 (uppersector) orSRW01 (lowersector), SRWn0 =SRW10 (upper

sector) orSRW00 (lowersector)

TheALE pulseinperiod T7 is only present if thenextinstruction accesses theRAM

(internal or external).

XMEM Register

Description

MCU Control Register –

MCUCR

• Bit 7 – SRE: External SRAM/XMEM Enable

Writing SRE to one enables the ExternalMemory Interface.The pin functions AD7:0,

A15:8, ALE, WR

, and RD areactivated as thealternate pin functions.The SREbit over-

rides anypin direction settings in the respective Data Direction Registers. Writing SRE

to zero,disables the ExternalMemory Interfaceand thenormalpin anddata direction

settings areused.

• Bit 6 – SRW10: Wait State Select Bit

For a detaileddescription,see common description for the SRWn bitsbelow (EMCUCR

description).

Extended MCU Control

• Bit 6..4 – SRL2, SRL1, SRL0: Wait State Sector Limit

Itispossibletoconfigure different wait statesfordifferent external memory addresses.

The ExternalMemory address space can be divided in two sectors that have separate

wait state bits.The SRL2,SRL1, andSRL0 bitsselectthe splitting of these sectors, see

Table2andFigure11.By default, the SRL2,SRL1, andSRL0 bits are set to zeroand

theentire ExternalMemory address spaceis treated as one sector. When the entire

ALE

T1 T2 T3

Write

Read

A15:8

AddressPrev. Addr.

DA7:0

Address DataPrev. Data XX

DA7:0 (XMBK = 0)

DataPrev. Data Address

DA7:0 (XMBK = 1)

System Clock (CLK

CPU

)

T4 T5 T6

Bit 76543 210

SRE SRW10

SE SM1 ISC11 ISC10 ISC01 ISC00 MCUCR

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value00000000

Bit 76543 210

SM0 SRL2 SRL1 SRL0 SRW01 SRW00 SRW11 ISC2 EMCUCR

Read/Write R/W R/W R/W R/W R/W R/W R/W R/W

Initial Value00000000

1 2 ... 22 23 24 25 26 27 28 29 30 31 32 ... 222 223

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