
56
ATmega8515(L)
2512A–AVR–04/02
I/O Ports
Introduction All AVR portshave true Read-Modify-Write functionalitywhen used as generaldigital
I/Oports.This means that the direction of one port pin can be changedwithout uninten-
tionally changing the direction of any otherpin with the SBI andCBIinstructions.The
same applieswhen changing drive value (ifconfigured as output) or enabling/disabling
ofpull-upresistors (ifconfigured as input). Each output bufferhassymmetricaldrive
characteristics withbothhighsink andsource capability.The pin driver isstrong enough
to drive LED displays directly.All port pinshave individually selectable pull-upresistors
with a supply-voltage invariant resistance. All I/Opinshave protection diodes to both
V
CC
andGround as indicated in Figure 28. Refer to “ElectricalCharacteristics”onpage
194 for a complete listofparameters.
Figure 28. I/O Pin Equivalent Schematic
All registers andbit references in thissection are written in generalform. A lowercase
“x” represents the numbering letterfor the port, and a lowercase“n”represents the bit
number. However, when using the register orbit defines in a program, the precise form
must beused. For example, PORTB3 forbit no. 3 in Port B, here documented generally
as PORTxn. The physicalI/O Registers andbit locations are listed in “RegisterDescrip-
tion forI/O Ports”onpage 72.
Three I/O memory address locations areallocatedfor each port, one each for the Data
Register –PORTx, Data Direction Register – DDRx, and thePort Input Pins –PINx.The
Port Input PinsI/Olocation isread only, whilethe Data Register and the Data Direction
Register are read/write. Inaddition, thePull-upDisable–PUD bit in SFIOR disables the
pull-upfunction for all pins in all portswhen set.
Using the I/OportasGeneralDigitalI/O isdescribed in “Ports asGeneralDigitalI/O”on
page 57. Most port pins aremultiplexedwith alternate functionsfor the peripheralfea-
tures on the device. How each alternate function interfereswith the port pin isdescribed
in “Alternate Port Functions”onpage 61. Refer to theindividual module sectionsfor a
full description of thealternate functions.
Note that enabling thealternate function ofsome of the port pinsdoes not affecttheuse
of theotherpins in the portas generaldigitalI/O.
C
pin
Logic
R
pu
See Figure
"General Digital I/O" for
Details
Pxn
Kommentare zu diesen Handbüchern